TSICH=0000, SWTS=0, DMAEN=0
TSI DATA Register
TSICNT | TSI Conversion Counter Value |
SWTS | Software Trigger Start 0 (0): No effect. 1 (1): Start a scan to determine which channel is specified by TSI_DATA[TSICH]. |
DMAEN | DMA Transfer Enabled 0 (0): Interrupt is selected when the interrupt enable bit is set and the corresponding TSI events assert. 1 (1): DMA transfer request is selected when the interrupt enable bit is set and the corresponding TSI events assert. |
TSICH | TSICH 0 (0000): Channel 0. 1 (0001): Channel 1. 2 (0010): Channel 2. 3 (0011): Channel 3. 4 (0100): Channel 4. 5 (0101): Channel 5. 6 (0110): Channel 6. 7 (0111): Channel 7. 8 (1000): Channel 8. 9 (1001): Channel 9. 10 (1010): Channel 10. 11 (1011): Channel 11. 12 (1100): Channel 12. 13 (1101): Channel 13. 14 (1110): Channel 14. 15 (1111): Channel 15. |